A memristor is a two-terminal device whose resistance depends on the history of current passed through it, giving non-volatile analogue memory that can compute matrix-vector products in place; the physics is demonstrated across many material systems, but device-to-device randomness still confines it to small arrays and bespoke calibration.
Summary
Evidence base
Open questions
Does the roughly three-orders-of-magnitude variability suppression reported for Ge3.5Te1 CBRAM hold at array sizes far beyond 16x16, and over extended endurance and retention testing?
Can training-side methods such as the temporal-switch framework deliver transfer across chips from different fabrication runs and material families, not just across devices within the studied families?
Do the simulated system-level wins, nanosecond in-memory MIMO detection and memristive branch prediction, survive fabrication with realistic D2D and C2C spread and read/write error rates?
Which mechanism wins where: filamentary RRAM/CBRAM, Mott oscillators, charge-density-wave states, nanofluidic channels or photonic MEMS, given that they differ in speed, integration route and inherent stochasticity?
Assessment drafted 2026-08-31 from up to 16 KB sources using the technology-scorecard framework; scores are a draft read pending review.
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Frontier questions
Does the roughly three-orders-of-magnitude variability suppression reported for Ge3.5Te1 CBRAM hold at array sizes far beyond 16x16, and over extended endurance and retention testing 2026 06 05 electrolyte bonding engineering for highly uniform gete base?
Can training-side methods such as the temporal-switch framework deliver transfer across chips from different fabrication runs and material families, not just across devices within the studied families 2026 07 07 towards transferable lightweight neuromorphic computing thro?
Do the simulated system-level wins, nanosecond in-memory MIMO detection and memristive branch prediction, survive fabrication with realistic D2D and C2C spread and read/write error rates 2026 06 02 in memory computing enabled deep mimo detection to support u 2026 07 30 investigating reservoir computing for branch predictionin pi?
Which mechanism wins where: filamentary RRAM/CBRAM, Mott oscillators, charge-density-wave states, nanofluidic channels or photonic MEMS, given that they differ in speed, integration route and inherent stochasticity 2026 06 04 room temperature memristive switching between charge density 2026 07 27 micro electromechanical photonic integrated memristors?
Does the ~1000x variability suppression in Ge3.5Te1 CBRAM hold across wafer-scale arrays and over extended endurance cycling, or is it a small-sample result 2026 06 05 electrolyte bonding engineering for highly uniform gete base?
Can measured filament size and spatial distribution statistics be turned into a predictive model of cycle-to-cycle and device-to-device variation, rather than post-hoc characterisation 2026 05 05 investigation of filamentation in a siagcu memristors with a?
What retention time and cycling endurance do EuTe4 CDW states show at 300-400 K, and how many distinct resistance levels are reliably addressable by pulse voltage 2026 06 04 room temperature memristive switching between charge density?
Which of RRAM, PCM and MRAM meets the reliability thresholds needed for commercial digital PIM, and at which device-level metric do they currently fail 2026 06 05 a comparative study of digital memristor based processing in?
Do photonic MEMS memristors resolve durability, optical loss and fabrication yield simultaneously at array scale, or do these trade off against one another 2026 07 27 micro electromechanical photonic integrated memristors?